.EQU	I_Bit,   0x80            // when I bit is set, IRQ is disabled
.EQU	F_Bit,   0x40            // when F bit is set, FIQ is disabled


				.text
                .arm
__sys_disableIRQ:
				MRS     R0, SPSR
				ORR     R0, R0, #I_Bit
				MSR     SPSR_c, R0
				MOV     PC, LR			
			
__sys_enableIRQ:
				MRS   	R0, SPSR
				BIC   	R0, R0, #I_Bit
				MSR  	SPSR_c, R0
				MOV    	PC, LR
				
__sys_disableFIQ:
				MRS     R0, SPSR
				ORR     R0, R0, #F_Bit
				MSR     SPSR_c, R0
				MOV     PC, LR			
			
__sys_enableFIQ:
				MRS   	R0, SPSR
				BIC   	R0, R0, #F_Bit
				MSR  	SPSR_c, R0
				MOV    	PC, LR
				
				.end
